A known word-size expandable microprocessor comprises registers, arithmetic-logic device, input, output information and control buses and buses for input and output transfer; all components of the microprocessor are interconnected in a fixed manner.
A drawback of this microprocessor is that it is possible with it to perform only one operation at a given moment. Moreover, the transfer of information between the registers is also effected sequentially, i.e. only one transfer is effected at a given moment. The possibility of using these microprocessors to assemble large systems by their combination, where simultaneously data is exchanged and is processed, is quite limited.